Wednesday, 3 July 2013

Dr. Eric Rotenberg Receives Award For Research by the National Science Foundation

Dr. Eric Rotenberg
Dr. Eric Rotenberg

Dr. Eric Rotenberg has been awarded $350,000 by the National Science Foundation for research on SHF: Small: Design for Competitive Automated Layout (DCAL) of Mobile Application Processor.

The award will run from August 1st, 2012 to July 31st, 2015.

Research Abstract

For two decades, personal computers and servers have been powered by increasingly sophisticated superscalar processors. The last few years has even witnessed the introduction of superscalar processors into smart phones and tablet PCs, in order to provide richer user experiences. There are important trends in both domains: server-class processors require unsustainable design effort, as evidenced by a select few, highly trained, large design teams in industry proliferating superscalar processors; mobile devices are evolving at an extraordinary pace. These trends suggest it is time to take a radical departure in the way superscalar processors are designed. In particular, the PI proposes superscalar processor design automation. This project explores challenges and solutions at key levels:

Automatic FPGA-based processor-in-system exploration Efficient and automatic ISA/microarchitecture decoupling Automatic RTL generation via a superscalar design language A low-effort physical design strategy and alternative to custom design.

View the original article here

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